Posts tagged "FPGA"

1 post

z486: A 486-Class Pipelined FPGA CPU with Integrated Floating-Point

I released z386, an open-source 80386 CPU core, in May and added the 80386 early-start optimization in June. Early start overlaps address generation for one instruction with completion of its predecessor. It was an important 386 performance feature, but it also previewed the more systematic i486 pipeline. The MiSTer core needed more performance, so I continued in that direction and added further 486-class mechanisms.

The result is z486, an open-source, 80486-class pipelined x86 CPU written in SystemVerilog. It combines hardwired, pipelined execution for common instructions with microcode for complex architectural behavior.

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