Posts tagged "FPGA"

2 posts

Recreating Voodoo Graphics and a Late-1990s Gaming PC on an FPGA

I've spent the last month adding features and improving performance in z486_MiSTer, mostly working through games from the first half of the 1990s. Looking a few years ahead brought me to another change I wanted to explore: the arrival of 3D graphics cards.

The first one that left a strong impression on me was the Voodoo. The game was Need for Speed II SE. Smooth textures, fog, and the speed of the whole thing made it feel like a new generation of PC gaming. Could I recreate that on an FPGA now that the z486 CPU exists?

The result of this detour is zSST, a SystemVerilog implementation of the 3dfx Voodoo Graphics, or SST-1. Combined with my z486 CPU and the surrounding PC hardware, it forms z486 XL: a DOS PC with Voodoo graphics running in the programmable logic of a Xilinx KV260 board. Tomb Raider now runs with its original 3dfx renderer.

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z486: A 486-Class Pipelined FPGA CPU with Integrated Floating-Point

I released z386, an open-source 80386 CPU core, in May and added the 80386 early-start optimization in June. Early start overlaps address generation for one instruction with completion of its predecessor. It was an important 386 performance feature, but it also previewed the more systematic i486 pipeline. The MiSTer core needed more performance, so I continued in that direction and added further 486-class mechanisms.

The result is z486, an open-source, 80486-class pipelined x86 CPU written in SystemVerilog. It combines hardwired, pipelined execution for common instructions with microcode for complex architectural behavior.

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